| Date | August 18-20, 2002 |
| Place | Memorial Auditorium, Stanford University |
| Committees | Organizing and Program Committees |
Tutorials
| Tutorials | Sunday, August 18, 2002 |
|---|---|
| Morning Tutorial 08:30-12:00 |
IC Technology Scaling Trends, Challenges, & Potential Solutions through 2016 Chair: Keith Diefendorff Speakers: Peter M. Zeitzoff, Dr. Alfred K. Wong, Dr. Michael E. Thomas (Sematech International, Univ. of Hong Kong, Honeywell Electronic Materials) |
| Afternoon Tutorial 1:30-5:00 |
Performance Comparison of State-of-the-Art Volatile and Non-Volatile Memory Devices Chair: Pradeep Dubey Speakers: Rajesh K. Gupta Center for Embedded Computer Systems, UC Irvine |
Conference Day One
| Session | Monday, August 19, 2002 |
|---|---|
| Opening Remarks 8:20-8:30 |
Amr Zaky, General Chair John Wawrzynek, Program Co-Chairs Keith Diefendorff |
| Session 1 8:30-10:00 |
Intel Processors Chair: John Shen McKinley Processor, San Soltis (Hewlett-Packard), Cameron McNairy (Intel) 
An Analysis of the CPU2K Benchmarks on the McKinley Processor, James McCormick, Hewlett Packard, Allan D. Knies (Intel) Intel® Netburst™ Microarchitecture and Hyper-Threading Technology, Debbie Marr (Intel) |
| Keynote 1 10:30-11:20 |
Always On: Always Aware. Net Life 2005, Eric Schmidt, CTO (Google) |
| Session 2 11:20-12:20 |
Network Processors Chair: Siamak Arya Benchmark Performance: IBM PowerNP NP4GS3 Network Processor, Nathan Pham (IBM)
Challenges in Making Highly Integrated Network Processors, Keith Morris (AMCC) |
| Session 3 1:30-3:00 |
Interconnects Chair: Marc Tremblay (Sun)A 20Gb/s 0.13um CMOS Serial Link, Patrick Chiang, William J. Dally, Ming-Ju Edward Lee (Stanford University)
Smarter Interconnects for Smarter Chips, Scott Evans, John Ivie, Michael J. Meyer, Geert Rosseel, Jay Tomlinson, Wolf-Dietrich Weber, Drew Wingard (Sonics) JIO : High Performance I/O & Graphics For UltraSPARC IIIi-based Systems, Bikram Saha (Sun) |
| Session 4 3:30-5:00 |
Technology Chair: Hidetaka MagoshiIntegrated Cryptographic Hardware Engines on the zSeries Microprocessor, Jeffrey A. Magee, Thomas S. Fuchs, Seth R. Greenspan, Thomas Koehler, Bernd Nerz, Timothy J. Slegel (IBM)
How a processor can permute n bits in O(1) cycles, Ruby Lee, et al. (Princeton University) CMOS Crossbar, Ting Wu, Chi-Ying Tsui, Mounir Hamdi (Hong Kong University of Science & Technology) |
| Session 5 5:30-6:30 |
Systems on Chip I Chair: Tom RiordanThe RM9000 Family of Integrated Multiprocessor Devices, Paul C. Cobb (PMC-Sierra)
Alchemy Au1x00, Paul Bassett (AMD) |
| Panel Discussion 7:45-9:00 |
Embedded Systems Software : Visions of the Future Moderator: John Mashey (Sensei Partners)Chris Rowen, CEO (Tensilica) Larry Mitage, CTO (Stellcom) Jim Turley (JimTurley.com) Nick Tredennick (Dynamic Silicon) |
Conference Day Two
| Session | Tuesday, August 20, 2002 |
|---|---|
| Session 6 8:30-10:00 |
Potpourri Chair: Mike Flynn (Stanford University)The Atheros Chipset for 108 Mb/s Multi-Mode Wireless LANs, Bill McFarland (Atheros Comm.)
PipeRench: Power & Performance Evaluation of a Programmable Pipelined Datapath, Benjamin A. Levine, Herman H.Schmit (CMU) GeForce4, Henry Moreton, John Montrym (Nvidia) |
| Keynote 2 10:30-11:20 |
Incredible Challenges of the Air Traffic Control System Tom Edwards (NASA) |
| Session 7 11:20-12:20 |
Digital Signal Processors Chair: John KubiatowiczA New Distributed DSP Architecture Based on the Intel IXS, Ernest Tsui, Jumar Ganapathy, T. Chun, A. Dagan, I. Hirsh, H. Honary, R. Nicholis, L. Snyder, K. Sundstrom (Intel)
VASA: Single-chip MPEG-2 422P@HL CODEC LSI w/Multi-chip Config. for Large Scale Processing Beyond HDTV Level, Jiro Naganuma, Hiroe Iwasaki, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, and Makoto Endo (NTT Cyber Space Laboratories, NTT) |
| Session 8 1:30-2:30 |
Switches Chair: Howard SachsDelivering On The Promise of Asynchronous Circuit Design, Andrew Lines (Fulcrum Micro)
A Scalable Switch Fabric to Multi-Terabit: Architecture and Challenges, Francois Le Maut, Gilles Garcia (IBM) |
| Session 9 3:00-4:30 |
Systems on Chip II Chair: Pradeep DubeyFirePath, Sophie Wilson, Rich Porter (Broadcom)
Broadcom Calisto: A Multi-Channel Multi-Service Communication Platform, John Nickolls, L. J. Madar III, Scott Johnson, Viresh Rustagi, Ken Unger, Mustafiz Choudhury (Broadcom) BCM1101 Ethernet IP Phone / Gateway Platform, Andy Fung (Broadcom) |
| Session 10 5:00-6:30 |
AMD Hammer Chair: John SellThe AMD x86-64 ISA: Extending the x86 to 64-bits, Kevin J. McGrath, David Christie (AMD)
The AMD Hammer Processor Core, Chetana Keltcher, A. Ahmed, M. Clark, H. Gao, K. Goveas, R. Haddad, B. Holloway, W. Hughes, R. Klass, D. Kroesche, P. Madrid, K. McGrath, T. Tan, S. White, T. Wood, G. Zurasaki, Jr. (AMD) Hammer Shared Memory Multi Processor Systems, Ardsher Ahmed, Pat Conway, Bill Hughes, Fred Weber (AMD) |